48] I. Widjaja and A. I. Elwalid, \performance Issues in Vc-merge Capable Switches for Ip over Atm Networks," 128

\The MainStreetXpress core services node-a versatile ATM switch architecture for the full service network," IEEE J. \Multicast contention resolution with single-cycle windowing using content addressable FIFO's," IEEE/ACM Trans. \Input versus output queueing on a space-division packet switch," IEEE Trans. \32 32 shared buuer type ATM switch VLSI's for B-ISDN's," IEEE J. Select. \A 160-Gb/s ATM switching system using an internal speed-up crossbar switch," in Proc.cal implementation and packaging technologies for a large-scale ATM switching system," IEEE J. and analysis of a large-scale multicast output buuered ATM switch," IEEE/ACM Trans. \SCOQ: a fast packet switch with shared concentration and output queueing," IEEE/ACM Trans. 123 ized multicast contention resolution algorithm can make over 1 billion multicast cell forwarding decisions per second with small implementation complexity. In Chapter 6, two large-capacity IP switches are proposed: a packet inter-leaving IP switch and a cell interleaving IP switch. These switches have a memoryless nonblocking switch fabric and buuers at both the input and output ports. In a packet interleaving IP switch, an idea merging VCs using a priority handling is described. The delay performance of a packet interleaving IP switch with an internal speed-up of 2 is better than that of the output-buuered VC merge capable IP switch. In a cell interleaving IP switch, there are reassembly buuers at the output ports in order to achieve VC merge capability. A new cell dispatching scheme facilitating cell interleav-ing is also described. The cell interleaving IP switch is more scalable than the packet interleaving IP switch even though the performance and hardware complexity of the cell interleaving IP switch are worse than that the packet interleaving IP switch. 122 source. Maximum throughput is obtained versus output expansion ratio, output channel group size, window size, and internal speed-up factor. Average input and output buuer delays are obtained versus throughput. The input buuer's average delay is much smaller than the output buuer's average delay for an output port expansion ratio of 4 or an internal speed-up of 2. It is also shown that the impact of the burstiness of input traac on the input buuer's average delay is very small. It is shown that multicast traac has a lower delay than unicast traac because a multicast cell can be sent to multiple destinations in a time slot while a unicast cell can be sent to only one destination in a time slot. In Chapter 4, three alternatives for a …